Automated Single Slot Tester

Background

Astronics Test Systems has developed a semiconductor test system, the Single Slot Tester (SST), to meet the demand of low throughput test systems in industry. The current SST requires a technician to individually place DUT’s (Device Under Test) into the BIB (Burn In Board) and remove after testing is completed.

Goal and Objectives

The goal of this project is to integrate Astronic’s existing SST with a FANUC six axis robot to fully automate the testing process.

Contacts

Faculty Advisors:

Dr. Farzad Ahmadknanlou - farzad.a@uci.edu

Dr. Vince Mcdonell - vgmcdone@uci.edu

 

Student Contact:

Jose Pereida - jpereida@uci.edu

Project status: 
Archived
Department: 
MAE
Term: 
Fall
Academic year: 
2018-2019
Fall Poster: